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kmx20 cpu

Hardware registers

The kmx20 has 3 hardware registers,

Name Size Description
ip Word Instruction pointer
dp Byte Data Stack Pointer
rp Byte Return Stack Pointer


The kmx20 has 2 data busses.

+---0x00000---+ <-- IVT
|    (rwx)    |
+---0x00100---+ <-- Boot
|    (rwx)    |
|             |
|             |
.             .
.             .
.             .
|             |
+---0x40000---+ <-- Data Stack
|    (rw-)    |
+---0x40400---+ <-- Return Stack
|    (rw-)    |


Instructions take 1 byte in memory. If you looked at an instructions binary representation with letters: KFOOOOOO


Op Stack effect Description
np -- no-op
ex -- halt execution
pb --n puts the next byte (8 bits) in memory onto the stack
ph --n ^ same but next half-word (16 bits)
pw --n ^ same but next word (32 bits)
pr --n puts ip+the next byte plus onto the stack
fb a--n fetches a byte from address a and puts it onto the stack
fh a--n ^ same but with half-word
fw a--n ^ same but with word
mb n a-- truncate stack item n into a byte and put it in memory address `a
mh n a-- ^ same but with half-word
mw n a-- ^ same but with word
io n p-- move cell n to io port p
ii p--n gets cell from io port p and pushes it onto the stack
ss n-~n move cell from data stack to return stack
dr n-- drop item from data stack
sw n m--m n swap items
du n--n n duplicate item on data stack
ov n m--n m n bring second item on data stack over
ad n m--n+m add
su n m--n-m subtract
mu n m--n*m multiply
di n m--n/m n%m div rem
an n m--n&m bitwise and
or n m--n|m bitwise or
xr n m--n^m bitwise xor
sl n m--n<<m bitwise shift left
sr n m--n>>m bitwise shift right
sa n m--n>>>m bitwise arithmetic shift right
eq n m--n==m logical equals
lt n m--n<m logical less than
gt n m--n>m logical greater than
no n--!n logical not
ju a-- jump to address a
jc n a-- jump to address a if n!=0
ca a-~r push ip onto return stack, then jump to address a
cc n a-~r push ip onto return stack and jump to address a if n!=0